>> >> switch (state->interface) {
>> >> case PHY_INTERFACE_MODE_NA:
>> >> + case PHY_INTERFACE_MODE_USXGMII:
>> >> + case PHY_INTERFACE_MODE_10GKR:
>> >> + if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
>> >> + phylink_set(mask, 1baseCR_Full);
>> >> +
On Tue, Jun 25, 2019 at 08:49:33AM +, Parshuram Raju Thombare wrote:
> >>switch (state->interface) {
> >>case PHY_INTERFACE_MODE_NA:
> >> + case PHY_INTERFACE_MODE_USXGMII:
> >> + case PHY_INTERFACE_MODE_10GKR:
> >> + if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
> >> +
>> +static inline void gem_mac_configure(struct macb *bp, int speed)
>> +switch (speed) {
>> +case SPEED_1000:
>> +gem_writel(bp, NCFGR, GEM_BIT(GBE) |
>> + gem_readl(bp, NCFGR));
>> +break;
>> +case SPEED_100:
>> +macb_writel(bp
>> switch (state->interface) {
>> case PHY_INTERFACE_MODE_NA:
>> +case PHY_INTERFACE_MODE_USXGMII:
>> +case PHY_INTERFACE_MODE_10GKR:
>> +if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
>> +phylink_set(mask, 1baseCR_Full);
>> +
On Mon, Jun 24, 2019 at 01:12:35PM +0100, Parshuram Thombare wrote:
> This patch add support for high speed USXGMII PCS and 10G
> speed in Cadence ethernet controller driver.
>
> Signed-off-by: Parshuram Thombare
> ---
> drivers/net/ethernet/cadence/macb.h | 41 +
> drivers/net/etherne
This patch add support for high speed USXGMII PCS and 10G
speed in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 41 +
drivers/net/ethernet/cadence/macb_main.c | 189 ---
2 files changed, 207 insertio
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