[...]
>>
>> I think a better approach is to use the new sdhci-caps* bindings to
>> mask those caps that can't be trusted. And then use the generic mmc
>> bindings for speed modes instead.
>>
>> That should be a safer approach, right!?
>
> Right.
>
> But, if I know the caps register bits 63-32 are
Hi Ulf,
2016-12-13 16:52 GMT+09:00 Ulf Hansson :
> [...]
>
+
+Optional properties:
+For eMMC configuration, supported speed modes are not indicated by the
SDHCI
+Capabilities Register. Instead, the following properties should be
specified
+if supported. See m
[...]
>>> +
>>> +Optional properties:
>>> +For eMMC configuration, supported speed modes are not indicated by the
>>> SDHCI
>>> +Capabilities Register. Instead, the following properties should be
>>> specified
>>> +if supported. See mmc.txt for details.
>>> +- mmc-ddr-1_8v
>>> +- mmc-ddr-1_2v
Hi Rob.
2016-12-13 2:14 GMT+09:00 Rob Herring :
>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt
>> b/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt
>> new file mode 100644
>> index 000..750374f
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mmc/sd
On Thu, Dec 08, 2016 at 09:50:55PM +0900, Masahiro Yamada wrote:
> Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.
>
> For SD, it basically relies on the SDHCI standard code.
> For eMMC, this driver provides some callbacks to support the
> hardware part that is specific to this IP desi
Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.
For SD, it basically relies on the SDHCI standard code.
For eMMC, this driver provides some callbacks to support the
hardware part that is specific to this IP design.
Signed-off-by: Masahiro Yamada
Acked-by: Adrian Hunter
---
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