On Wed, Aug 05, 2015 at 06:27:24PM -0700, Stephen Boyd wrote:
> On 04/28/2015 12:23 PM, Kumar Gala wrote:
> >+
> >+int __qcom_scm_call_armv8_64(u64 x0, u64 x1, u64 x2, u64 x3, u64 x4, u64 x5,
> >+u64 *ret1, u64 *ret2, u64 *ret3)
> >+{
> >+register u64 r0 asm("r0") =
On 04/28/2015 12:23 PM, Kumar Gala wrote:
+
+int __qcom_scm_call_armv8_64(u64 x0, u64 x1, u64 x2, u64 x3, u64 x4, u64 x5,
+ u64 *ret1, u64 *ret2, u64 *ret3)
+{
+ register u64 r0 asm("r0") = x0;
+ register u64 r1 asm("r1") = x1;
+ register u64 r2 asm
> On Apr 29, 2015, at 11:38 AM, Mark Rutland wrote:
>
> On Wed, Apr 29, 2015 at 05:18:04PM +0100, Kumar Gala wrote:
>>
>>> On Apr 29, 2015, at 10:42 AM, Mark Rutland wrote:
>>>
>>> Hi Kumar,
>>>
>>> On Tue, Apr 28, 2015 at 08:23:58PM +0100, Kumar Gala wrote:
Add an implementation of the
On Wed, Apr 29, 2015 at 05:18:04PM +0100, Kumar Gala wrote:
>
> > On Apr 29, 2015, at 10:42 AM, Mark Rutland wrote:
> >
> > Hi Kumar,
> >
> > On Tue, Apr 28, 2015 at 08:23:58PM +0100, Kumar Gala wrote:
> >> Add an implementation of the SCM interface that works on ARM64/64-bit SoCs
> >
> > What
> On Apr 29, 2015, at 10:42 AM, Mark Rutland wrote:
>
> Hi Kumar,
>
> On Tue, Apr 28, 2015 at 08:23:58PM +0100, Kumar Gala wrote:
>> Add an implementation of the SCM interface that works on ARM64/64-bit SoCs
>
> What is the intended use of this on arm64 SoCs?
>
> Given the negative reaction t
Hi Kumar,
On Tue, Apr 28, 2015 at 08:23:58PM +0100, Kumar Gala wrote:
> Add an implementation of the SCM interface that works on ARM64/64-bit SoCs
What is the intended use of this on arm64 SoCs?
Given the negative reaction to the SMP bringup [1] code that seems to be
the only user, I'm somewhat
Add an implementation of the SCM interface that works on ARM64/64-bit SoCs
Signed-off-by: Kumar Gala
Signed-off-by: Lina Iyer
---
* v5:
- use common error defines from qcom_scm.h
- removed R*_STR defines
* v4:
- Folded in change to qcom_scm_cpu_power_down to remove HOTPLUG flag
from Lina.
7 matches
Mail list logo
