Re: [PATCH v5 1/3] PCI/IOV: Mark VFs as not implementing PCI_COMMAND_MEMORY

2020-09-16 Thread Bjorn Helgaas
On Thu, Sep 10, 2020 at 10:59:55AM -0400, Matthew Rosato wrote: > For VFs, the Memory Space Enable bit in the Command Register is > hard-wired to 0. > > Add a new bit to signify devices where the Command Register Memory > Space Enable bit does not control the device's response to MMIO > accesses.

[PATCH v5 1/3] PCI/IOV: Mark VFs as not implementing PCI_COMMAND_MEMORY

2020-09-10 Thread Matthew Rosato
For VFs, the Memory Space Enable bit in the Command Register is hard-wired to 0. Add a new bit to signify devices where the Command Register Memory Space Enable bit does not control the device's response to MMIO accesses. Signed-off-by: Matthew Rosato --- drivers/pci/iov.c | 1 + include/linu