On Thu, Sep 10, 2020 at 10:59:55AM -0400, Matthew Rosato wrote:
> For VFs, the Memory Space Enable bit in the Command Register is
> hard-wired to 0.
>
> Add a new bit to signify devices where the Command Register Memory
> Space Enable bit does not control the device's response to MMIO
> accesses.
For VFs, the Memory Space Enable bit in the Command Register is
hard-wired to 0.
Add a new bit to signify devices where the Command Register Memory
Space Enable bit does not control the device's response to MMIO
accesses.
Signed-off-by: Matthew Rosato
---
drivers/pci/iov.c | 1 +
include/linu
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