Re: [PATCH v5 05/20] irqchip: add nps Internal and external irqchips

2015-12-30 Thread Vineet Gupta
On Sunday 27 December 2015 06:53 PM, Noam Camus wrote: > From: Noam Camus ... > +static struct irq_domain *nps400_root_domain; This can simply be a local var now ! > +static void nps400_handle_irq(unsigned int hwirq, struct pt_regs *regs) > +{ > + handle_domain_irq(nps400_root_domain, hwir

Re: [PATCH v5 05/20] irqchip: add nps Internal and external irqchips

2015-12-30 Thread Vineet Gupta
On Sunday 27 December 2015 06:53 PM, Noam Camus wrote: > From: Noam Camus [snip..] > + > +static int nps400_irq_map(struct irq_domain *d, unsigned int virq, > + irq_hw_number_t hw) > +{ > + switch (hw) { > + case TIMER0_IRQ: > + irq_set_percpu_devid(virq

[PATCH v5 05/20] irqchip: add nps Internal and external irqchips

2015-12-27 Thread Noam Camus
From: Noam Camus Adding EZchip NPS400 support. NPS internal interrupts are internally handled at Multi Thread Manager (MTM) that is signaled for deactivating an interrupt. External interrupts is handled also at Global Interrupt Controller (GIC) e.g. serial and network devices. Signed-off-by: Noa