[PATCH v5 0/2] clk: uniphier: add clock drivers for UniPhier SoCs

2016-08-01 Thread Masahiro Yamada
I split into two patches to make review easier. 1/2: core support code 2/2: data arrays Changes in v5: - Assign each gating register bit with a separate clk - Fix examples in binding document to add specific compatible - Document provided clocks for system clock Changes in v4: - Unify

Re: [PATCH v5 0/2] clk: uniphier: add clock drivers for UniPhier SoCs

2016-07-27 Thread Masahiro Yamada
Hi. I will send v6, so please do not apply this version. (meantime review is very appreciated, though.) 2016-07-27 3:09 GMT+09:00 Masahiro Yamada : > I split into two patches to make review easier. > > 1/2: core support code > 2/2: data arrays > > > Changes in v5: > - Rebase onto next-201

[PATCH v5 0/2] clk: uniphier: add clock drivers for UniPhier SoCs

2016-07-26 Thread Masahiro Yamada
I split into two patches to make review easier. 1/2: core support code 2/2: data arrays Changes in v5: - Rebase onto next-20160726 for easier git-am Changes in v4: - Unify module_platform_driver() boilerplate into a single place - Add binding document - Add USB3 clocks Changes in v3: