Re: [PATCH v4 2/3] irqchip: Add Actions Semi Owl SIRQ controller

2020-08-19 Thread Cristian Ciocaltea
On Tue, Aug 18, 2020 at 09:48:41PM +0100, Marc Zyngier wrote: > On Tue, 18 Aug 2020 18:42:41 +0100, > Cristian Ciocaltea wrote: > > > > Hi Marc, > > > > Thanks for your quick and detailed review! > > > > On Mon, Aug 17, 2020 at 02:52:06PM +0100, Marc Zyngier wrote: > > > On 2020-08-16 12:33, Cr

Re: [PATCH v4 2/3] irqchip: Add Actions Semi Owl SIRQ controller

2020-08-18 Thread Marc Zyngier
On Tue, 18 Aug 2020 18:42:41 +0100, Cristian Ciocaltea wrote: > > Hi Marc, > > Thanks for your quick and detailed review! > > On Mon, Aug 17, 2020 at 02:52:06PM +0100, Marc Zyngier wrote: > > On 2020-08-16 12:33, Cristian Ciocaltea wrote: > > > This controller appears on Actions Semi Owl family

Re: [PATCH v4 2/3] irqchip: Add Actions Semi Owl SIRQ controller

2020-08-18 Thread Cristian Ciocaltea
Hi Marc, Thanks for your quick and detailed review! On Mon, Aug 17, 2020 at 02:52:06PM +0100, Marc Zyngier wrote: > On 2020-08-16 12:33, Cristian Ciocaltea wrote: > > This controller appears on Actions Semi Owl family SoC's S500, S700 and > > S900 and provides support for 3 external interrupt con

Re: [PATCH v4 2/3] irqchip: Add Actions Semi Owl SIRQ controller

2020-08-17 Thread Marc Zyngier
On 2020-08-16 12:33, Cristian Ciocaltea wrote: This controller appears on Actions Semi Owl family SoC's S500, S700 and S900 and provides support for 3 external interrupt controllers through Is that really 3 interrupt controllers? Or merely 3 interrupt lines? dedicated SIRQ pins. Each line ca

[PATCH v4 2/3] irqchip: Add Actions Semi Owl SIRQ controller

2020-08-16 Thread Cristian Ciocaltea
This controller appears on Actions Semi Owl family SoC's S500, S700 and S900 and provides support for 3 external interrupt controllers through dedicated SIRQ pins. Each line can be independently configured as interrupt and triggers on either of the edges (raising or falling) or either of the level