Hi,
On 29/01/2019 15:56:31+0100, Jonas Bonn wrote:
> On 29/01/2019 15:27, nicolas.fe...@microchip.com wrote:
> > On 29/01/2019 at 09:38, Jonas Bonn wrote:
> > >
> > > + /* DLYBCT adds delays between words. This is useful for slow devices
> > > + * that need a bit of time to setup the next trans
Hi,
On 29/01/2019 15:27, nicolas.fe...@microchip.com wrote:
On 29/01/2019 at 09:38, Jonas Bonn wrote:
+ /* DLYBCT adds delays between words. This is useful for slow devices
+* that need a bit of time to setup the next transfer.
+*/
+ if (spi->word_delay_us) {
Wel
On 29/01/2019 at 09:38, Jonas Bonn wrote:
> If the SPI slave requires an inter-word delay, configure the DLYBCT
> register accordingly.
>
> Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
> board).
>
> Signed-off-by: Jonas Bonn
> CC: Nicolas Ferre
> CC: Mark Brown
> CC: Alex
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux-...@vger.kerne
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