Re: [PATCH v4 2/2] i2c: cadence: Check for errata condition involving master receive

2014-12-11 Thread Sören Brinkmann
On Thu, 2014-12-11 at 12:46PM +0530, Harini Katakam wrote: > Hi Soren, > > On Wed, Dec 10, 2014 at 11:15 PM, Sören Brinkmann > wrote: > > On Wed, 2014-12-10 at 05:14PM +0530, Harini Katakam wrote: > >> Cadence I2C controller has the following bugs: > >> - completion indication is not given to the

Re: [PATCH v4 2/2] i2c: cadence: Check for errata condition involving master receive

2014-12-10 Thread Harini Katakam
Hi Soren, On Wed, Dec 10, 2014 at 11:15 PM, Sören Brinkmann wrote: > On Wed, 2014-12-10 at 05:14PM +0530, Harini Katakam wrote: >> Cadence I2C controller has the following bugs: >> - completion indication is not given to the driver at the end of >> a read/receive transfer with HOLD bit set. >> -

Re: [PATCH v4 2/2] i2c: cadence: Check for errata condition involving master receive

2014-12-10 Thread Sören Brinkmann
On Wed, 2014-12-10 at 05:14PM +0530, Harini Katakam wrote: > Cadence I2C controller has the following bugs: > - completion indication is not given to the driver at the end of > a read/receive transfer with HOLD bit set. > - Invalid read transaction are generated on the bus when HW timeout > conditi

[PATCH v4 2/2] i2c: cadence: Check for errata condition involving master receive

2014-12-10 Thread Harini Katakam
Cadence I2C controller has the following bugs: - completion indication is not given to the driver at the end of a read/receive transfer with HOLD bit set. - Invalid read transaction are generated on the bus when HW timeout condition occurs with HOLD bit set. As a result of the above, if a set of m