On 04/04/2017 06:25 AM, Andy Shevchenko wrote:
Please, STOP top-posting.
On Mon, Apr 3, 2017 at 4:51 AM, Sathyanarayanan Kuppuswamy Natarajan
wrote:
Yes, just applying this patch will fix the existing offset issue.
Then the question how it was tested in both cases (before this change and no
Please, STOP top-posting.
On Mon, Apr 3, 2017 at 4:51 AM, Sathyanarayanan Kuppuswamy Natarajan
wrote:
> Yes, just applying this patch will fix the existing offset issue.
Then the question how it was tested in both cases (before this change and now) ?
>
> On Sun, Apr 2, 2017 at 7:11 AM, Andy She
Yes, just applying this patch will fix the existing offset issue.
On Sun, Apr 2, 2017 at 7:11 AM, Andy Shevchenko
wrote:
> On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan
> wrote:
>> According to Broxton APL PMC spec, gcr mem region starts
>> at offset 0x1000 from ipc mem base address
On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan
wrote:
> According to Broxton APL PMC spec, gcr mem region starts
> at offset 0x1000 from ipc mem base address. In this driver,
> PLAT_RESOURCE_GCR_OFFSET macro defines the offset of GCR
> memory region from IPC mem region. So we should us
According to Broxton APL PMC spec, gcr mem region starts
at offset 0x1000 from ipc mem base address. In this driver,
PLAT_RESOURCE_GCR_OFFSET macro defines the offset of GCR
memory region from IPC mem region. So we should use 0x1000(4K)
as GCR offset. But currently this driver uses 0x1008 as GCT
of
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