Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

2019-08-21 Thread Maxime Ripard
On Tue, Aug 20, 2019 at 08:07:53AM -0500, Samuel Holland wrote: > On 8/20/19 6:18 AM, Ondřej Jirman wrote: > >> + reset = devm_reset_control_get(dev, NULL); > >> + if (IS_ERR(reset)) { > >> + ret = PTR_ERR(reset); > >> + dev_err(dev, "Failed to get reset control: %d\n", ret); >

Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

2019-08-20 Thread Ondřej Jirman
Hi, On Tue, Aug 20, 2019 at 08:07:53AM -0500, Samuel Holland wrote: > On 8/20/19 6:18 AM, Ondřej Jirman wrote: > > Hi Samuel, > > > > On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: > >> Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box > >> used for communica

Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

2019-08-20 Thread Samuel Holland
On 8/20/19 6:18 AM, Ondřej Jirman wrote: > Hi Samuel, > > On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: >> Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box >> used for communication between the ARM CPUs and the ARISC management >> coprocessor. The hardware c

Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

2019-08-20 Thread Ondřej Jirman
Hi Samuel, On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: > Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box > used for communication between the ARM CPUs and the ARISC management > coprocessor. The hardware contains 8 unidirectional 4-message FIFOs. > > Add

Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

2019-08-20 Thread Maxime Ripard
Hi, On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: > Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box > used for communication between the ARM CPUs and the ARISC management > coprocessor. The hardware contains 8 unidirectional 4-message FIFOs. > > Add a drive

[PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

2019-08-19 Thread Samuel Holland
Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box used for communication between the ARM CPUs and the ARISC management coprocessor. The hardware contains 8 unidirectional 4-message FIFOs. Add a driver for it, so it can be used for SCPI or other communication protocols. Signed