July 23, 2012, Thomas Abraham wrote:
> On 20 July 2012 16:08, Seungwon Jeon wrote:
> > July 20, 2012, Thomas Abraham wrote:
> >> On 19 July 2012 09:21, Seungwon Jeon wrote:
>
> [...]
>
> >> >> +static unsigned long exynos5250_dwmmc_caps[4] = {
> >> >> + MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DD
On 20 July 2012 16:08, Seungwon Jeon wrote:
> July 20, 2012, Thomas Abraham wrote:
>> On 19 July 2012 09:21, Seungwon Jeon wrote:
[...]
>> >> +static unsigned long exynos5250_dwmmc_caps[4] = {
>> >> + MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR |
>> >> + MMC_CAP_8_BIT_DATA | MMC_CAP_C
July 20, 2012, Thomas Abraham wrote:
> On 19 July 2012 09:21, Seungwon Jeon wrote:
> > Hi,
> >
> > This version does not seems to consider previous reviews fully.
> > Could you check the comments below?
>
> I did try to address all the comments. I will check again and resubmit
> if I have missed
On 19 July 2012 09:21, Seungwon Jeon wrote:
> Hi,
>
> This version does not seems to consider previous reviews fully.
> Could you check the comments below?
I did try to address all the comments. I will check again and resubmit
if I have missed anything.
>
> July 12, 2012, Thomas Abraham wrote:
Hi,
This version does not seems to consider previous reviews fully.
Could you check the comments below?
July 12, 2012, Thomas Abraham wrote:
> The instantiation of the Synopsis Designware controller on Exynos5250
> include extension for SDR and DDR specific tx/rx phase shift timing
> and CIU int
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
command hold stage is also introduced. Add support for these Exynos5250
specfic extenstions
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