> On Thursday, May 30, 2019 2:11 PM Andy Lutomirski [mailto:l...@kernel.org]
> wrote:
> On Fri, May 24, 2019 at 5:05 PM Fenghua Yu wrote:
> >
> > C0.2 state in umwait and tpause instructions can be enabled or
> > disabled on a processor through IA32_UMWAIT_CONTROL MSR register.
> >
> > By default
On Fri, May 24, 2019 at 5:05 PM Fenghua Yu wrote:
>
> C0.2 state in umwait and tpause instructions can be enabled or disabled
> on a processor through IA32_UMWAIT_CONTROL MSR register.
>
> By default, C0.2 is enabled and the user wait instructions result in
> lower power consumption with slower wa
C0.2 state in umwait and tpause instructions can be enabled or disabled
on a processor through IA32_UMWAIT_CONTROL MSR register.
By default, C0.2 is enabled and the user wait instructions result in
lower power consumption with slower wakeup time.
But in real time systems which requrie faster wake
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