Re: [PATCH v3 3/5] RISC-V: Align the .init.text section

2020-12-22 Thread Palmer Dabbelt
On Fri, 18 Dec 2020 00:19:09 PST (-0800), ati...@atishpatra.org wrote: On Thu, Dec 17, 2020 at 12:33 AM Atish Patra wrote: On Wed, Dec 16, 2020 at 10:51 PM Palmer Dabbelt wrote: > > On Tue, 15 Dec 2020 22:02:54 PST (-0800), Palmer Dabbelt wrote: > > On Wed, 04 Nov 2020 16:04:37 PST (-0800), A

Re: [PATCH v3 3/5] RISC-V: Align the .init.text section

2020-12-18 Thread Atish Patra
On Thu, Dec 17, 2020 at 12:33 AM Atish Patra wrote: > > On Wed, Dec 16, 2020 at 10:51 PM Palmer Dabbelt wrote: > > > > On Tue, 15 Dec 2020 22:02:54 PST (-0800), Palmer Dabbelt wrote: > > > On Wed, 04 Nov 2020 16:04:37 PST (-0800), Atish Patra wrote: > > >> In order to improve kernel text protecti

Re: [PATCH v3 3/5] RISC-V: Align the .init.text section

2020-12-17 Thread Atish Patra
On Wed, Dec 16, 2020 at 10:51 PM Palmer Dabbelt wrote: > > On Tue, 15 Dec 2020 22:02:54 PST (-0800), Palmer Dabbelt wrote: > > On Wed, 04 Nov 2020 16:04:37 PST (-0800), Atish Patra wrote: > >> In order to improve kernel text protection, we need separate .init.text/ > >> .init.data/.text in separat

Re: [PATCH v3 3/5] RISC-V: Align the .init.text section

2020-12-16 Thread Palmer Dabbelt
On Tue, 15 Dec 2020 22:02:54 PST (-0800), Palmer Dabbelt wrote: On Wed, 04 Nov 2020 16:04:37 PST (-0800), Atish Patra wrote: In order to improve kernel text protection, we need separate .init.text/ .init.data/.text in separate sections. However, RISC-V linker relaxation code is not aware of any

Re: [PATCH v3 3/5] RISC-V: Align the .init.text section

2020-12-15 Thread Palmer Dabbelt
On Wed, 04 Nov 2020 16:04:37 PST (-0800), Atish Patra wrote: In order to improve kernel text protection, we need separate .init.text/ .init.data/.text in separate sections. However, RISC-V linker relaxation code is not aware of any alignment between sections. As a result, it may relax any RISCV_C

[PATCH v3 3/5] RISC-V: Align the .init.text section

2020-11-04 Thread Atish Patra
In order to improve kernel text protection, we need separate .init.text/ .init.data/.text in separate sections. However, RISC-V linker relaxation code is not aware of any alignment between sections. As a result, it may relax any RISCV_CALL relocations between sections to JAL without realizing that