On Tue, 28 Feb 2017, Andreas Färber wrote:
> This is a callback, which I thought is re-entrant.
It's not reentrant at least not on the same CPU. On a SMP machine this
function might be called concurrently on several cores (assumed that the
whole thing is replicated across cores).
> VAL changes wh
On Tue, 28 Feb 2017, Daniel Lezcano wrote:
> On Tue, Feb 28, 2017 at 06:08:06PM +0100, Andreas Färber wrote:
> > >> +static irqreturn_t owl_timer1_interrupt(int irq, void *dev_id)
> > >> +{
> > >> +struct clock_event_device *evt = (struct clock_event_device
> > >> *)dev_id;
> > >> +
> > >>
On Tue, Feb 28, 2017 at 07:35:14AM +0100, Andreas Färber wrote:
> The Actions Semi S500 SoC provides four timers, 2Hz0/1 and 32-bit TIMER0/1.
>
> Use TIMER0 as clocksource and TIMER1 as clockevents.
>
> Based on LeMaker linux-actions tree.
>
> An S500 datasheet can be found on the LeMaker Guitar
Am 28.02.2017 um 18:39 schrieb Daniel Lezcano:
> On Tue, Feb 28, 2017 at 06:08:06PM +0100, Andreas Färber wrote:
>>> Instead of computing again and again the base, why not just precompute:
>>>
>>> owl_clksrc_base = owl_timer_base +
>>> owl_timer_info->timer_offset[OWL_TIMER0]
>>> owl_clkev
On Tue, Feb 28, 2017 at 06:08:06PM +0100, Andreas Färber wrote:
[ ... ]
> > Instead of computing again and again the base, why not just precompute:
> >
> > owl_clksrc_base = owl_timer_base +
> > owl_timer_info->timer_offset[OWL_TIMER0]
> > owl_clkevt_base = owl_timer_base +
> > owl_tim
Am 28.02.2017 um 17:47 schrieb Daniel Lezcano:
> On Tue, Feb 28, 2017 at 07:35:14AM +0100, Andreas Färber wrote:
>> The Actions Semi S500 SoC provides four timers, 2Hz0/1 and 32-bit TIMER0/1.
>>
>> Use TIMER0 as clocksource and TIMER1 as clockevents.
>>
>> Based on LeMaker linux-actions tree.
>>
>>
The Actions Semi S500 SoC provides four timers, 2Hz0/1 and 32-bit TIMER0/1.
Use TIMER0 as clocksource and TIMER1 as clockevents.
Based on LeMaker linux-actions tree.
An S500 datasheet can be found on the LeMaker Guitar pages:
http://www.lemaker.org/product-guitar-download-29.html
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