On Wed, 15 Jul 2020 at 09:15, Anup Patel wrote:
> The current RISC-V timer driver is convoluted and implements two
> distinct timers:
> 1. S-mode timer: This is for Linux RISC-V S-mode with MMU. The
> clocksource is implemented using TIME CSR and clockevent device
> is implemented using S
The current RISC-V timer driver is convoluted and implements two
distinct timers:
1. S-mode timer: This is for Linux RISC-V S-mode with MMU. The
clocksource is implemented using TIME CSR and clockevent device
is implemented using SBI Timer calls.
2. M-mode timer: This is for Linux RISC-V
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