On Wed, 29 Jul 2015, Andy Shevchenko wrote:
> On Intel Edison we have an interesting implementation of x86 platform without
> legacy PIC and with specific PCI. There are devices which are not using
> interrupt line 0, but have it assigned in the PCI configuration. By default
> first come gets it,
On Intel Edison we have an interesting implementation of x86 platform without
legacy PIC and with specific PCI. There are devices which are not using
interrupt line 0, but have it assigned in the PCI configuration. By default
first come gets it, though the first eMMC host controller is the actual u
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