On Wed, May 7, 2014 at 8:05 PM, Arnd Bergmann wrote:
> On Wednesday 07 May 2014 17:21:13 Srikanth Thokala wrote:
>> On Wed, Apr 30, 2014 at 9:04 PM, Arnd Bergmann wrote:
>> > On Tuesday 15 April 2014, Srikanth Thokala wrote:
>> >> +/**
>> >> + * xilinx_pcie_get_config_base - Get configuration bas
On Wed, May 07 2014 at 3:53:27 pm BST, Will Deacon wrote:
> Hi all,
>
> Thanks for CC'ing me, Arnd.
>
> On Wed, May 07, 2014 at 03:35:48PM +0100, Arnd Bergmann wrote:
>> On Wednesday 07 May 2014 17:21:13 Srikanth Thokala wrote:
>> > On Wed, Apr 30, 2014 at 9:04 PM, Arnd Bergmann wrote:
>> > > Wo
Hi all,
Thanks for CC'ing me, Arnd.
On Wed, May 07, 2014 at 03:35:48PM +0100, Arnd Bergmann wrote:
> On Wednesday 07 May 2014 17:21:13 Srikanth Thokala wrote:
> > On Wed, Apr 30, 2014 at 9:04 PM, Arnd Bergmann wrote:
> > > Would it be possible to split the config space access out into
> > > a se
On Wednesday 07 May 2014 17:21:13 Srikanth Thokala wrote:
> On Wed, Apr 30, 2014 at 9:04 PM, Arnd Bergmann wrote:
> > On Tuesday 15 April 2014, Srikanth Thokala wrote:
> >> +/**
> >> + * xilinx_pcie_get_config_base - Get configuration base
> >> + * @bus: Bus structure of current bus
> >> + * @devf
On Wed, Apr 30, 2014 at 9:04 PM, Arnd Bergmann wrote:
> On Tuesday 15 April 2014, Srikanth Thokala wrote:
>> +Required properties:
>> +- #address-cells: Address representation for root ports, set to <3>
>> +- #size-cells: Size representation for root ports, set to <2>
>> +- #interrupt-cells: speci
On Thu, May 1, 2014 at 3:11 AM, Bjorn Helgaas wrote:
> On Tue, Apr 15, 2014 at 05:08:31PM +0530, Srikanth Thokala wrote:
>> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>>
>> Signed-off-by: Srikanth Thokala
>> ---
>> Changes in v3:
>> - Rebased on v3.15.0-rc1
>> - Added support for
On Tue, Apr 15, 2014 at 05:08:31PM +0530, Srikanth Thokala wrote:
> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>
> Signed-off-by: Srikanth Thokala
> ---
> Changes in v3:
> - Rebased on v3.15.0-rc1
> - Added support for interrupt-map DT functionality.
> - Removed map_irq() wrapper,
On Tuesday 15 April 2014, Srikanth Thokala wrote:
> +Required properties:
> +- #address-cells: Address representation for root ports, set to <3>
> +- #size-cells: Size representation for root ports, set to <2>
> +- #interrupt-cells: specifies the number of cells needed to encode an
> + interrup
Hi Bjorn,
On 04/15/2014 01:38 PM, Srikanth Thokala wrote:
> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>
> Signed-off-by: Srikanth Thokala
> ---
> Changes in v3:
> - Rebased on v3.15.0-rc1
> - Added support for interrupt-map DT functionality.
> - Removed map_irq() wrapper, instea
Hi,
Kindly review the driver and please let me know if you have any comments.
Thanks
Srikanth
On Tue, Apr 15, 2014 at 5:08 PM, Srikanth Thokala wrote:
> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>
> Signed-off-by: Srikanth Thokala
> ---
> Changes in v3:
> - Rebased on v3.15.0-
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
Signed-off-by: Srikanth Thokala
---
Changes in v3:
- Rebased on v3.15.0-rc1
- Added support for interrupt-map DT functionality.
- Removed map_irq() wrapper, instead using of_irq_parse_and_map_pci().
- Modified resource mapping logic as pe
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