On 11/02/2018 03:06, Chao Gao wrote:
> Although L2 is in halt state, it will be in the active state after
> VM entry if the VM entry is vectoring according to SDM 26.6.2 Activity
> State. Halting the vcpu here means the event won't be injected to L2
> and this decision isn't reported to L1. Thus L0
- chao@intel.com wrote:
> Although L2 is in halt state, it will be in the active state after
> VM entry if the VM entry is vectoring according to SDM 26.6.2
> Activity
> State. Halting the vcpu here means the event won't be injected to L2
> and this decision isn't reported to L1. Thus L0
Although L2 is in halt state, it will be in the active state after
VM entry if the VM entry is vectoring according to SDM 26.6.2 Activity
State. Halting the vcpu here means the event won't be injected to L2
and this decision isn't reported to L1. Thus L0 drops an event that
should be injected to L2
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