Re: [PATCH v2 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

2018-11-29 Thread Atish Patra
On 11/29/18 9:59 PM, Atish Patra wrote: On 11/27/18 2:04 AM, Anup Patel wrote: Currently on SMP host, all CPUs take external interrupts routed via PLIC. All CPUs will try to claim a given external interrupt but only one of them will succeed while other CPUs would simply resume whatever they were

Re: [PATCH v2 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

2018-11-29 Thread Anup Patel
On Fri, Nov 30, 2018 at 11:29 AM Atish Patra wrote: > > On 11/27/18 2:04 AM, Anup Patel wrote: > > Currently on SMP host, all CPUs take external interrupts routed via > > PLIC. All CPUs will try to claim a given external interrupt but only > > one of them will succeed while other CPUs would simply

Re: [PATCH v2 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

2018-11-29 Thread Atish Patra
On 11/27/18 2:04 AM, Anup Patel wrote: Currently on SMP host, all CPUs take external interrupts routed via PLIC. All CPUs will try to claim a given external interrupt but only one of them will succeed while other CPUs would simply resume whatever they were doing before. This means if we have N CP

[PATCH v2 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

2018-11-27 Thread Anup Patel
Currently on SMP host, all CPUs take external interrupts routed via PLIC. All CPUs will try to claim a given external interrupt but only one of them will succeed while other CPUs would simply resume whatever they were doing before. This means if we have N CPUs then for every external interrupt N-1