Rob,
On 19/09/16 08:21, Mirza Krak wrote:
> 2016-09-06 12:32 GMT+02:00 Jon Hunter :
>>
>> On 31/08/16 12:22, Mirza Krak wrote:
>>> 2016-08-30 19:06 GMT+02:00 Rob Herring :
>>
>> ...
>>
> nvidia,snor-cs = <4>;
NAK, no custom CS properties.
>>
>> Ok, so ...
>>
>>> gmi@
2016-09-06 12:32 GMT+02:00 Jon Hunter :
>
> On 31/08/16 12:22, Mirza Krak wrote:
>> 2016-08-30 19:06 GMT+02:00 Rob Herring :
>
> ...
>
nvidia,snor-cs = <4>;
>>>
>>> NAK, no custom CS properties.
>
> Ok, so ...
>
>> gmi@7009 {
>> compatible = "nvidia,tegra20-gmi";
>
On 31/08/16 12:22, Mirza Krak wrote:
...
> Taking your comments in to account I end up with this:
>
> gmi@7009 {
> compatible = "nvidia,tegra20-gmi";
> reg = <0x70009000 0x1000>;
> #address-cells = <2>;
Does this need to be 2? Seems simpler if this is 1.
Cheers
Jon
On 31/08/16 12:22, Mirza Krak wrote:
> 2016-08-30 19:06 GMT+02:00 Rob Herring :
...
>>> nvidia,snor-cs = <4>;
>>
>> NAK, no custom CS properties.
Ok, so ...
> gmi@7009 {
> compatible = "nvidia,tegra20-gmi";
> reg = <0x70009000 0x1000>;
> #address-ce
2016-08-30 19:06 GMT+02:00 Rob Herring :
> On Wed, Aug 24, 2016 at 09:54:47PM +0200, Mirza Krak wrote:
>> 2016-08-24 17:56 GMT+02:00 Jon Hunter :
>> +
>> >> +Example with two SJA1000 CAN controllers connected to the GMI bus. We
>> >> wrap the
>> >> +controllers with a simple-bus node since they ar
2016-08-30 17:02 GMT+02:00 Marcel Ziswiler :
> On Wed, 2016-08-24 at 15:37 +0200, Mirza Krak wrote:
>> From: Mirza Krak
>>
>> Document the devicetree bindings for the Generic Memory Interface
>> (GMI)
>> bus driver found on Tegra SOCs.
>>
>> Signed-off-by: Mirza Krak
>> ---
>> Changes in v2:
>> -
On Wed, 2016-08-24 at 15:37 +0200, Mirza Krak wrote:
> From: Mirza Krak
>
> Document the devicetree bindings for the Generic Memory Interface
> (GMI)
> bus driver found on Tegra SOCs.
>
> Signed-off-by: Mirza Krak
> ---
> Changes in v2:
> - Updated examples and some information based on comment
On Wed, Aug 24, 2016 at 09:54:47PM +0200, Mirza Krak wrote:
> 2016-08-24 17:56 GMT+02:00 Jon Hunter :
> +
> >> +Example with two SJA1000 CAN controllers connected to the GMI bus. We
> >> wrap the
> >> +controllers with a simple-bus node since they are all connected to the
> >> same
> >> +chip-sel
2016-08-26 9:25 GMT+02:00 Jon Hunter :
>
> On 26/08/16 05:53, Mirza Krak wrote:
>
> ...
>
>>> I have an idea which is following:
>>>
>>> gmi@7009 {
>>> status = "okay";
>>> #address-cells = <2>;
>>> #size-cells = <1>;
>>> ranges = <4 0 0x4800 0x0004>;
On 26/08/16 05:53, Mirza Krak wrote:
...
>> I have an idea which is following:
>>
>> gmi@7009 {
>> status = "okay";
>> #address-cells = <2>;
>> #size-cells = <1>;
>> ranges = <4 0 0x4800 0x0004>;
>>
>> cs4 {
>> compatible
2016-08-24 21:54 GMT+02:00 Mirza Krak :
> 2016-08-24 17:56 GMT+02:00 Jon Hunter :
> +
>>> +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap
>>> the
>>> +controllers with a simple-bus node since they are all connected to the same
>>> +chip-select (CS4), in this example ext
2016-08-24 17:56 GMT+02:00 Jon Hunter :
+
>> +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap
>> the
>> +controllers with a simple-bus node since they are all connected to the same
>> +chip-select (CS4), in this example external address decoding is provided:
>> +
>> +gmi
On 24/08/16 14:37, Mirza Krak wrote:
> From: Mirza Krak
>
> Document the devicetree bindings for the Generic Memory Interface (GMI)
> bus driver found on Tegra SOCs.
>
> Signed-off-by: Mirza Krak
> ---
> Changes in v2:
> - Updated examples and some information based on comments from Jon Hunter
From: Mirza Krak
Document the devicetree bindings for the Generic Memory Interface (GMI)
bus driver found on Tegra SOCs.
Signed-off-by: Mirza Krak
---
Changes in v2:
- Updated examples and some information based on comments from Jon Hunter.
.../devicetree/bindings/bus/nvidia,tegra20-gmi.txt |
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