Re: [PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-07-10 Thread Naik, Avadhut
On 7/10/2024 04:38, Borislav Petkov wrote: > On Tue, Jul 09, 2024 at 01:27:25AM -0500, Naik, Avadhut wrote: > >> Userspace error decoding tools like the rasdaemon gather related hardware >> error >> information through the tracepoints. As such, its important to have these two >> registers in t

Re: [PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-07-10 Thread Borislav Petkov
On Tue, Jul 09, 2024 at 01:27:25AM -0500, Naik, Avadhut wrote: > IIUC, its an abbreviation of a Latin word and is used as a synonym for > "namely" > or "that is to say". > Might not be the best choice in this case. Will change it. I learn new stuff every day: https://en.wikipedia.org/wiki/Viz.

Re: [PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-07-08 Thread Naik, Avadhut
On 6/26/2024 13:18, Borislav Petkov wrote: > On Wed, Jun 26, 2024 at 12:24:20PM -0500, Naik, Avadhut wrote: >> >> >> On 6/26/2024 06:10, Borislav Petkov wrote: >>> On Tue, Jun 25, 2024 at 02:56:22PM -0500, Avadhut Naik wrote: AMD's Scalable MCA systems viz. Genoa will include two new regist

Re: [PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-06-26 Thread Borislav Petkov
On Wed, Jun 26, 2024 at 12:24:20PM -0500, Naik, Avadhut wrote: > > > On 6/26/2024 06:10, Borislav Petkov wrote: > > On Tue, Jun 25, 2024 at 02:56:22PM -0500, Avadhut Naik wrote: > >> AMD's Scalable MCA systems viz. Genoa will include two new registers: > > > > "viz."? > > > Right. Will mention

[PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-06-26 Thread Naik, Avadhut
On 6/26/2024 06:10, Borislav Petkov wrote: > On Tue, Jun 25, 2024 at 02:56:22PM -0500, Avadhut Naik wrote: >> AMD's Scalable MCA systems viz. Genoa will include two new registers: > > "viz."? > Right. Will mention Zen4 instead of Genoa. > Not a lot of people outside of AMD know what Genoa is.

Re: [PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-06-26 Thread Borislav Petkov
On Tue, Jun 25, 2024 at 02:56:22PM -0500, Avadhut Naik wrote: > AMD's Scalable MCA systems viz. Genoa will include two new registers: "viz."? Not a lot of people outside of AMD know what Genoa is. Zen4 is probably a lot more widespread. > MCA_SYND1 and MCA_SYND2. > > These registers will includ

[PATCH v2 2/4] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers

2024-06-25 Thread Avadhut Naik
AMD's Scalable MCA systems viz. Genoa will include two new registers: MCA_SYND1 and MCA_SYND2. These registers will include supplemental error information in addition to the existing MCA_SYND register. The data within the registers is considered valid if MCA_STATUS[SyndV] is set. Add fields for t