Re: [PATCH v2 2/3] mtd: spi-nor: core: Allow flashes to specify MTD writesize

2020-11-30 Thread Pratyush Yadav
On 28/11/20 10:59AM, tudor.amba...@microchip.com wrote: > On 11/18/20 8:24 PM, Pratyush Yadav wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > > content is safe > > > > Some flashes like the Cypress S28 family use ECC. Under this ECC scheme, > > multi-pass w

Re: [PATCH v2 2/3] mtd: spi-nor: core: Allow flashes to specify MTD writesize

2020-11-28 Thread Tudor.Ambarus
On 11/18/20 8:24 PM, Pratyush Yadav wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Some flashes like the Cypress S28 family use ECC. Under this ECC scheme, > multi-pass writes to an ECC block is not allowed. In other words, once > data is

[PATCH v2 2/3] mtd: spi-nor: core: Allow flashes to specify MTD writesize

2020-11-18 Thread Pratyush Yadav
Some flashes like the Cypress S28 family use ECC. Under this ECC scheme, multi-pass writes to an ECC block is not allowed. In other words, once data is programmed to an ECC block, it can't be programmed again without erasing it first. Upper layers like file systems need to be given this informatio