Re: [PATCH v2 12/20] mips: MAAR: Add XPA mode support

2020-05-20 Thread Serge Semin
On Tue, May 19, 2020 at 05:42:13PM +0200, Thomas Bogendoerfer wrote: > On Wed, May 06, 2020 at 08:42:30PM +0300, sergey.se...@baikalelectronics.ru > wrote: > > From: Serge Semin > > > > When XPA mode is enabled the normally 32-bits MAAR pair registers > > are extended to be of 64-bits width as i

Re: [PATCH v2 12/20] mips: MAAR: Add XPA mode support

2020-05-19 Thread Thomas Bogendoerfer
On Wed, May 06, 2020 at 08:42:30PM +0300, sergey.se...@baikalelectronics.ru wrote: > From: Serge Semin > > When XPA mode is enabled the normally 32-bits MAAR pair registers > are extended to be of 64-bits width as in pure 64-bits MIPS > architecture. In this case the MAAR registers can enable th

[PATCH v2 12/20] mips: MAAR: Add XPA mode support

2020-05-06 Thread Sergey.Semin
From: Serge Semin When XPA mode is enabled the normally 32-bits MAAR pair registers are extended to be of 64-bits width as in pure 64-bits MIPS architecture. In this case the MAAR registers can enable the speculative loads/stores for addresses of up to 39-bits width. But in this case the process