Re: [PATCH v2 10/27] perf parse-events: Create two hybrid cache events

2021-03-15 Thread Jin, Yao
Hi Jiri, On 3/16/2021 7:05 AM, Jiri Olsa wrote: On Thu, Mar 11, 2021 at 03:07:25PM +0800, Jin Yao wrote: SNIP + config_terms, pmu); + if (ret) + return ret; + } + + return 0; +} + int parse_events_

Re: [PATCH v2 10/27] perf parse-events: Create two hybrid cache events

2021-03-15 Thread Jiri Olsa
On Thu, Mar 11, 2021 at 03:07:25PM +0800, Jin Yao wrote: SNIP > + config_terms, pmu); > + if (ret) > + return ret; > + } > + > + return 0; > +} > + > int parse_events_add_cache(struct list_head *list, int *idx, >

[PATCH v2 10/27] perf parse-events: Create two hybrid cache events

2021-03-10 Thread Jin Yao
For cache events, they have pre-defined configs. The kernel needs to know where the cache event comes from (e.g. from cpu_core pmu or from cpu_atom pmu). But the perf type 'PERF_TYPE_HW_CACHE' can't carry pmu information. So the kernel introduces a new type 'PERF_TYPE_HW_CACHE_PMU'. The new attr.