Re: [PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-16 Thread Will Deacon
On Thu, Jul 16, 2015 at 04:04:30PM +0100, Waiman Long wrote: > On 07/16/2015 10:07 AM, Waiman Long wrote: > > On 07/16/2015 01:42 AM, Peter Zijlstra wrote: > >> On Wed, Jul 15, 2015 at 08:18:23PM -0400, Waiman Long wrote: > >>> On 07/15/2015 05:10 AM, Peter Zijlstra wrote: > /* > +

Re: [PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-16 Thread Waiman Long
On 07/16/2015 10:07 AM, Waiman Long wrote: On 07/16/2015 01:42 AM, Peter Zijlstra wrote: On Wed, Jul 15, 2015 at 08:18:23PM -0400, Waiman Long wrote: On 07/15/2015 05:10 AM, Peter Zijlstra wrote: /* + * A failed cmpxchg doesn't provide any memory-ordering guarantees, + * so we

Re: [PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-16 Thread Waiman Long
On 07/16/2015 01:42 AM, Peter Zijlstra wrote: On Wed, Jul 15, 2015 at 08:18:23PM -0400, Waiman Long wrote: On 07/15/2015 05:10 AM, Peter Zijlstra wrote: /* +* A failed cmpxchg doesn't provide any memory-ordering guarantees, +* so we need a barrier to order the read of th

Re: [PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-15 Thread Peter Zijlstra
On Wed, Jul 15, 2015 at 08:18:23PM -0400, Waiman Long wrote: > On 07/15/2015 05:10 AM, Peter Zijlstra wrote: > > /* > >+ * A failed cmpxchg doesn't provide any memory-ordering guarantees, > >+ * so we need a barrier to order the read of the node data in > >+ * pv_unhash *after* we'v

Re: [PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-15 Thread Waiman Long
On 07/15/2015 05:10 AM, Peter Zijlstra wrote: On Tue, Jul 14, 2015 at 10:13:32PM -0400, Waiman Long wrote: The smp_store_release() is not a full barrier. In order to avoid missed wakeup, we may need to add memory barrier around locked and cpu state variables adding to complexity. As the chance o

Re: [PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-15 Thread Peter Zijlstra
On Tue, Jul 14, 2015 at 10:13:32PM -0400, Waiman Long wrote: > The smp_store_release() is not a full barrier. In order to avoid missed > wakeup, we may need to add memory barrier around locked and cpu state > variables adding to complexity. As the chance of spurious wakeup is very > low, it is easi

[PATCH v2 1/6] locking/pvqspinlock: Unconditional PV kick with _Q_SLOW_VAL

2015-07-14 Thread Waiman Long
The smp_store_release() is not a full barrier. In order to avoid missed wakeup, we may need to add memory barrier around locked and cpu state variables adding to complexity. As the chance of spurious wakeup is very low, it is easier and safer to just do an unconditional kick at unlock time. Signed