On Wed, 21 Nov 2018, Stephen Boyd wrote:
> Quoting Paul Walmsley (2018-11-08 17:01:54)
> > On 10/25/18 12:47 AM, Stephen Boyd wrote:
> > > Quoting Paul Walmsley (2018-10-20 06:50:22)
> > >> diff --git a/drivers/clk/analogbits/wrpll-cln28hpc.c
> > >> b/drivers/clk/analogbits/wrpll-cln28hpc.c
> > >>
Quoting Paul Walmsley (2018-11-08 17:01:54)
> On 10/25/18 12:47 AM, Stephen Boyd wrote:
> > Quoting Paul Walmsley (2018-10-20 06:50:22)
> >> diff --git a/drivers/clk/analogbits/wrpll-cln28hpc.c
> >> b/drivers/clk/analogbits/wrpll-cln28hpc.c
> >> new file mode 100644
> >> index ..ebdef8
Hi Stephen,
On 10/25/18 12:47 AM, Stephen Boyd wrote:
> Quoting Paul Walmsley (2018-10-20 06:50:22)
>> Cc: Wesley Terpstra
>> Cc: Palmer Dabbelt
>> Cc: Michael Turquette
>> Cc: Stephen Boyd
>> Cc: Megan Wachs
>>
Quoting Paul Walmsley (2018-10-20 06:50:22)
> Add common library code for the Analog Bits Wide-Range PLL (WRPLL) as
> implemented in TSMC CLN28HPC.
>
> There is no bus interface or register target associated with this PLL.
> This library is intended to be used by drivers for IP blocks that
> expos
Add common library code for the Analog Bits Wide-Range PLL (WRPLL) as
implemented in TSMC CLN28HPC.
There is no bus interface or register target associated with this PLL.
This library is intended to be used by drivers for IP blocks that
expose registers connected to the PLL configuration and statu
5 matches
Mail list logo