On Fri, Jul 11, 2014 at 2:27 PM, Baruch Siach wrote:
> On Fri, Jul 11, 2014 at 02:06:29PM +0200, Linus Walleij wrote:
>> So given that an FPGA is a piece of hardware, it should have its firmware
>> loaded from the kernel and a kernel driver communicating with it I guess?
>>
>> I feel the smell of
Hi Linus,
On Fri, Jul 11, 2014 at 02:06:29PM +0200, Linus Walleij wrote:
> On Fri, Jul 11, 2014 at 8:28 AM, Baruch Siach wrote:
> > On Tue, Jul 08, 2014 at 11:27:57AM +0200, Linus Walleij wrote:
>
> >> What is the usecase here?
> >
> > During boot I need to know, for example, when an FPGA is rea
On Fri, Jul 11, 2014 at 8:28 AM, Baruch Siach wrote:
> On Tue, Jul 08, 2014 at 11:27:57AM +0200, Linus Walleij wrote:
>> What is the usecase here?
>
> During boot I need to know, for example, when an FPGA is ready to be
> programmed, and when said FPGA has finished its initialization. I also read
Hi Linus,
On Tue, Jul 08, 2014 at 11:27:57AM +0200, Linus Walleij wrote:
> On Mon, Jul 7, 2014 at 5:23 PM, Baruch Siach wrote:
> > On Mon, Jul 07, 2014 at 04:51:56PM +0200, Linus Walleij wrote:
>
> >> This needs someone to step in and provide a replacement, my preferred
> >> mechanism would be a
On Tue, Jul 8, 2014 at 5:55 PM, Sören Brinkmann
wrote:
> I fully agree and you don't have to convince me. But to a lot of our
> customers that are used to use FPGAs, SOCs and Linux are pretty new. You
> see a lot of scary stuff. Accessing /dev/mem seems to be a lot of
> people's big hammer soluti
Hi Linus,
On Tue, 2014-07-08 at 11:34AM +0200, Linus Walleij wrote:
> On Mon, Jul 7, 2014 at 6:08 PM, Sören Brinkmann
> wrote:
>
> >> So: what is the usecase for these GPIOs?
> >
> > Yea, in this case it was a button. I have to look at these drivers. It's
> > very likely that they cover what I w
On Mon, Jul 7, 2014 at 6:08 PM, Sören Brinkmann
wrote:
>> So: what is the usecase for these GPIOs?
>
> Yea, in this case it was a button. I have to look at these drivers. It's
> very likely that they cover what I want. But this case is trivial. I
> really don't do anything but enabling the IRQ by
On Mon, Jul 7, 2014 at 5:23 PM, Baruch Siach wrote:
> On Mon, Jul 07, 2014 at 04:51:56PM +0200, Linus Walleij wrote:
>> This needs someone to step in and provide a replacement, my preferred
>> mechanism would be a /dev/gpiochip0/... hierarchy using char devices.
>
> I really like the ability to c
On Mon, 2014-07-07 at 04:45PM +0200, Linus Walleij wrote:
> On Wed, Jun 18, 2014 at 1:39 PM, Harini Katakam wrote:
>
> > From: Harini Katakam
> >
> > Add support for GPIO controller used by Xilinx Zynq.
> >
> > Signed-off-by: Harini Katakam
> > Signed-off-by: Soren Brinkmann
> > ---
> >
> > v2
Hi Linus,
On Mon, 2014-07-07 at 04:51PM +0200, Linus Walleij wrote:
> On Wed, Jun 18, 2014 at 5:36 PM, Sören Brinkmann
> wrote:
>
> > I did some of the changes for this v2 and a few things are not clear to
> > me.
> >
> > The first is, how is userspace supposed to find the correct offset for a
>
Hi Linux,
On Mon, Jul 07, 2014 at 04:51:56PM +0200, Linus Walleij wrote:
> On Wed, Jun 18, 2014 at 5:36 PM, Sören Brinkmann
> wrote:
> > The first is, how is userspace supposed to find the correct offset for a
> > GPIO pin.
>
> The sysfs interface to GPIO is *NOT* *GOOD* this is universally
> a
On Wed, Jun 18, 2014 at 5:36 PM, Sören Brinkmann
wrote:
> I did some of the changes for this v2 and a few things are not clear to
> me.
>
> The first is, how is userspace supposed to find the correct offset for a
> GPIO pin.
The sysfs interface to GPIO is *NOT* *GOOD* this is universally
agreed
On Wed, Jun 18, 2014 at 1:39 PM, Harini Katakam wrote:
> From: Harini Katakam
>
> Add support for GPIO controller used by Xilinx Zynq.
>
> Signed-off-by: Harini Katakam
> Signed-off-by: Soren Brinkmann
> ---
>
> v2 changes:
> - convert to pm_runtime_force_(suspend|resume)
> - add pm_runtime_
Hi Linus,
I did some of the changes for this v2 and a few things are not clear to
me.
The first is, how is userspace supposed to find the correct offset for a
GPIO pin. E.g. let's say GPIO 10 of this SOC-internal GPIO controller is
something I want to control. So, I'd export GPIO (chip-base + 10)
From: Harini Katakam
Add support for GPIO controller used by Xilinx Zynq.
Signed-off-by: Harini Katakam
Signed-off-by: Soren Brinkmann
---
v2 changes:
- convert to pm_runtime_force_(suspend|resume)
- add pm_runtime_set_active in probe()
- also (un)prepare clocks when they are dis-/enabled
15 matches
Mail list logo
