Hi Miquel,
On 27/09/17 22:16, Miquel RAYNAL wrote:
> On Wed, 27 Sep 2017 08:53:18 +0200
> Miquel RAYNAL wrote:
>
>> Hello Kalyan,
>>
>> On Wed, 27 Sep 2017 13:55:16 +1300
>> Kalyan Kinthada wrote:
>>
>>> When the arbitration between NOR and NAND flash is enabled
>>> the field bit[21] in the Da
On Wed, 27 Sep 2017 08:53:18 +0200
Miquel RAYNAL wrote:
> Hello Kalyan,
>
> On Wed, 27 Sep 2017 13:55:16 +1300
> Kalyan Kinthada wrote:
>
> > When the arbitration between NOR and NAND flash is enabled
> > the field bit[21] in the Data Flash Control Register
> > needs to be set to 1 according
Hello Kalyan,
On Wed, 27 Sep 2017 13:55:16 +1300
Kalyan Kinthada wrote:
> When the arbitration between NOR and NAND flash is enabled
> the field bit[21] in the Data Flash Control Register
> needs to be set to 1 according to guidleine GL-5830741.
>
> This commit sets the FORCE_CSX bit to 1 for
When the arbitration between NOR and NAND flash is enabled
the field bit[21] in the Data Flash Control Register
needs to be set to 1 according to guidleine GL-5830741.
This commit sets the FORCE_CSX bit to 1 for all
ARMADA370 variants as the arbitration is always enabled by default.
Signed-off-b
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