On Tue, 15 Nov 2016, Andy Shevchenko wrote:
> Enable MWI mechanism if PCI bus master supports it.
>
> It might be potential benefit in some cases. Documentation [1] says that
> standard Memory Write might supply more current data than in the CPU modified
> cache line and "trashing a line in the c
On Tue, Nov 15, 2016 at 12:37:04PM +0200, Andy Shevchenko wrote:
> Enable MWI mechanism if PCI bus master supports it.
>
> It might be potential benefit in some cases. Documentation [1] says that
> standard Memory Write might supply more current data than in the CPU modified
> cache line and "tras
Enable MWI mechanism if PCI bus master supports it.
It might be potential benefit in some cases. Documentation [1] says that
standard Memory Write might supply more current data than in the CPU modified
cache line and "trashing a line in the cache may trash some data that is more
current that in t
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