On Wed, Jul 13, 2016 at 02:06:17PM +0200, Vincent Guittot wrote:
> Hi Morten,
>
> On 22 June 2016 at 19:03, Morten Rasmussen wrote:
> > Hi,
> >
> > The scheduler is currently not doing much to help performance on systems
> > with
> > asymmetric compute capacities (read ARM big.LITTLE). This seri
Hi Morten,
On 22 June 2016 at 19:03, Morten Rasmussen wrote:
> Hi,
>
> The scheduler is currently not doing much to help performance on systems with
> asymmetric compute capacities (read ARM big.LITTLE). This series improves the
> situation with a few tweaks mainly to the task wake-up path that c
On Tue, Jul 12, 2016 at 03:25:48PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 11, 2016 at 09:33:54AM +0100, Morten Rasmussen wrote:
> > On Wed, Jun 22, 2016 at 06:03:11PM +0100, Morten Rasmussen wrote:
> > > Hi,
> > >
> > > The scheduler is currently not doing much to help performance on systems
On Mon, Jul 11, 2016 at 09:33:54AM +0100, Morten Rasmussen wrote:
> On Wed, Jun 22, 2016 at 06:03:11PM +0100, Morten Rasmussen wrote:
> > Hi,
> >
> > The scheduler is currently not doing much to help performance on systems
> > with
> > asymmetric compute capacities (read ARM big.LITTLE). This ser
Hi Morten,
On 11 July 2016 at 10:33, Morten Rasmussen wrote:
> On Wed, Jun 22, 2016 at 06:03:11PM +0100, Morten Rasmussen wrote:
>> Hi,
>>
>> The scheduler is currently not doing much to help performance on systems with
>> asymmetric compute capacities (read ARM big.LITTLE). This series improves
On Wed, Jun 22, 2016 at 06:03:11PM +0100, Morten Rasmussen wrote:
> Hi,
>
> The scheduler is currently not doing much to help performance on systems with
> asymmetric compute capacities (read ARM big.LITTLE). This series improves the
> situation with a few tweaks mainly to the task wake-up path th
On Fri, Jul 08, 2016 at 07:35:56AM +, KEITA KOBAYASHI wrote:
> Hi,
>
> I tested these patches on Renesas SoC r8a7790(CA15*4 + CA7*4)
> and your preview branch[1] on Renesas SoC r8a7795(CA57*4 + CA53*4).
>
> > Test 0:
> > for i in `seq 1 10`; \
> >do sysbench --test=cpu --max-t
Hi,
I tested these patches on Renesas SoC r8a7790(CA15*4 + CA7*4)
and your preview branch[1] on Renesas SoC r8a7795(CA57*4 + CA53*4).
> Test 0:
> for i in `seq 1 10`; \
> do sysbench --test=cpu --max-time=3 --num-threads=1 run;
> \
> done \
> | awk '{if ($4==
On Tue, Jun 28, 2016 at 06:20:27PM +0800, Koan-Sin Tan wrote:
> Hi,
>
> I tested these patches with patches from your preview branch [1] and some
> platform specific patches on MediaTek MT8173 EVB (integrated branch at [2])
>
> > Test 0:
> > for i in `seq 1 10`; \
> >do sysbench -
Hi,
I tested these patches with patches from your preview branch [1] and some
platform specific patches on MediaTek MT8173 EVB (integrated branch at [2])
> Test 0:
> for i in `seq 1 10`; \
> do sysbench --test=cpu --max-time=3 --num-threads=1 run; \
> done \
>
Hi,
The scheduler is currently not doing much to help performance on systems with
asymmetric compute capacities (read ARM big.LITTLE). This series improves the
situation with a few tweaks mainly to the task wake-up path that considers
compute capacity at wake-up and not just whether a cpu is idle
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