Re: [PATCH v2] x86: Align TLB invalidation info

2018-01-31 Thread Andy Lutomirski
On Wed, Jan 31, 2018 at 1:00 PM, Nadav Amit wrote: > The TLB invalidation info is allocated on the stack, which might cause > it to be unaligned. Since this information may be transferred to > different cores for TLB shootdown, this might result in an additional > cache-line bouncing between the c

[PATCH v2] x86: Align TLB invalidation info

2018-01-31 Thread Nadav Amit
The TLB invalidation info is allocated on the stack, which might cause it to be unaligned. Since this information may be transferred to different cores for TLB shootdown, this might result in an additional cache-line bouncing between the cores. We do not use __cacheline_aligned() since it also def