On Tue, Oct 15, 2013 at 08:23:30PM +0800, Yi Zhang wrote:
I'm still not sure this is doing the right thing.
> + for (j = 0; j < bits_length; j++) {
> + if (!(d->mask_buf[i] & (0x1 << j))) {
This is checking to see if the bit is masked...
> +
clear the status bit if the mask register doesn't prevent
the chip level irq from being asserted
OR in the following sequence, there will be irq storm happens:
1) interrupt is triggered;
2) another thread disables it(the mask bit is set);
3) _Then_ the interrupt thread is not ACKed(the status bit
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