Re: [PATCH v2] i2c: rk3x: adjust the LOW divison based on characteristics of SCL

Addy, On Mon, Sep 29, 2014 at 12:45 AM, addy ke wrote: > Hi Doug > > On 2014/9/29 12:39, Doug Anderson wrote: >> Addy, >> >> On Sat, Sep 27, 2014 at 12:11 AM, Addy Ke wrote: >>> From: Addy >>> >>> As show in I2C specification: >>> - Standard-mode: the minimum HIGH period of the scl clock is 4.0

Re: [PATCH v2] i2c: rk3x: adjust the LOW divison based on characteristics of SCL

Hi Doug On 2014/9/29 12:39, Doug Anderson wrote: > Addy, > > On Sat, Sep 27, 2014 at 12:11 AM, Addy Ke wrote: >> From: Addy >> >> As show in I2C specification: >> - Standard-mode: the minimum HIGH period of the scl clock is 4.0us >> the minimum LOW period of the scl clock is 4.

Re: [PATCH v2] i2c: rk3x: adjust the LOW divison based on characteristics of SCL

Addy, On Sat, Sep 27, 2014 at 12:11 AM, Addy Ke wrote: > From: Addy > > As show in I2C specification: > - Standard-mode: the minimum HIGH period of the scl clock is 4.0us > the minimum LOW period of the scl clock is 4.7us > - Fast-mode: the minimum HIGH period of the scl clock i

[PATCH v2] i2c: rk3x: adjust the LOW divison based on characteristics of SCL

From: Addy As show in I2C specification: - Standard-mode: the minimum HIGH period of the scl clock is 4.0us the minimum LOW period of the scl clock is 4.7us - Fast-mode: the minimum HIGH period of the scl clock is 0.6us the minimum LOW period of the scl clock is 1.3u