On 10/20/2015 08:16 AM, Steve Capper wrote:
On Mon, Oct 19, 2015 at 04:09:09PM -0400, David Woods wrote:
>The arm64 MMU supports a Contiguous bit which is a hint that the TTE
>is one of a set of contiguous entries which can be cached in a single
>TLB entry. Supporting this bit adds new intermed
On Mon, Oct 19, 2015 at 04:09:09PM -0400, David Woods wrote:
> The arm64 MMU supports a Contiguous bit which is a hint that the TTE
> is one of a set of contiguous entries which can be cached in a single
> TLB entry. Supporting this bit adds new intermediate huge page sizes.
>
> The set of huge p
The arm64 MMU supports a Contiguous bit which is a hint that the TTE
is one of a set of contiguous entries which can be cached in a single
TLB entry. Supporting this bit adds new intermediate huge page sizes.
The set of huge page sizes available depends on the base page size.
Without using contig
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