On Thu, Feb 11, 2021 at 12:48:56PM +0200, stef...@marvell.com wrote:
> +static void mvpp2_cm3_write(struct mvpp2 *priv, u32 offset, u32 data)
> +{
> + writel(data, priv->cm3_base + offset);
> +}
> +
> +static u32 mvpp2_cm3_read(struct mvpp2 *priv, u32 offset)
> +{
> + return readl(priv->cm3
From: Stefan Chulski
This patch enables global flow control in FW and in the phylink validate mask.
Signed-off-by: Stefan Chulski
Acked-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 11 +--
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 30 +++-
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