On 8/14/07, Alan Cox <[EMAIL PROTECTED]> wrote:
> > +/**
> > + * Register transfer timing table
> > + */
>
> Libata has a complete set of transfer mode tables and timing functions -
> any reason for not using them ?
>
After a bit investigation, I find the timing paramters difined in
struct ata_tim
forgot to reply to all.
On 8/15/07, Sonic Zhang <[EMAIL PROTECTED]> wrote:
> On 8/14/07, Alan Cox <[EMAIL PROTECTED]> wrote:
> > > +/**
> > > + * Register transfer timing table
> > > + */
> >
> > Libata has a complete set of transfer mode tables and timing functions -
> > any reason for not using
> +/**
> + * Register transfer timing table
> + */
Libata has a complete set of transfer mode tables and timing functions -
any reason for not using them ?
> + /* increase tcyc - tdvs (tcyc_tdvs) until we
> meed
> +* the minimum cycle length
> +
This driver is for bf548 on chip ATAPI controller.
Both PIO 4 and UDMA5 mode are enabled.
Signed-off-by: Sonic Zhang <[EMAIL PROTECTED]>
---
drivers/ata/Kconfig | 28 +
drivers/ata/Makefile |1 +
drivers/ata/pata_bf54x.c | 1585
++
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