Re: [PATCH V8 5/5] libata: Align DMA buffer to dma_get_cache_alignment()

2017-10-19 Thread Matt Redfearn
On 18/10/17 14:03, Tejun Heo wrote: On Tue, Oct 17, 2017 at 04:05:42PM +0800, Huacai Chen wrote: In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so in ata_do_dev_read_id() the DMA buffer should be aligned to ARCH_DMA_MINALIGN. Otherwise, If a DMA buff

Re: [PATCH V8 5/5] libata: Align DMA buffer to dma_get_cache_alignment()

2017-10-18 Thread Alan Cox
> This function is called only for the PIO mode commands, so I doubt this > is > necessary... That is true but there are platforms out there that issue disk level PIO commands via DMA (or can do so). Indeed the Cyrix MediaGX could do that in the 1990s but I never add support 8) So I think i

Re: [PATCH V8 5/5] libata: Align DMA buffer to dma_get_cache_alignment()

2017-10-18 Thread Tejun Heo
On Tue, Oct 17, 2017 at 04:05:42PM +0800, Huacai Chen wrote: > In non-coherent DMA mode, kernel uses cache flushing operations to > maintain I/O coherency, so in ata_do_dev_read_id() the DMA buffer > should be aligned to ARCH_DMA_MINALIGN. Otherwise, If a DMA buffer > and a kernel structure share a

Re: [PATCH V8 5/5] libata: Align DMA buffer to dma_get_cache_alignment()

2017-10-17 Thread Sergei Shtylyov
On 10/17/2017 11:05 AM, Huacai Chen wrote: In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so in ata_do_dev_read_id() the DMA buffer should be aligned to ARCH_DMA_MINALIGN. Otherwise, If a DMA buffer and a kernel structure share a same cache line, and i

[PATCH V8 5/5] libata: Align DMA buffer to dma_get_cache_alignment()

2017-10-17 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so in ata_do_dev_read_id() the DMA buffer should be aligned to ARCH_DMA_MINALIGN. Otherwise, If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_i