On Tue, Apr 19, 2016 at 01:22:29PM +0200, Tomasz Nowicki wrote:
>
>
> On 19.04.2016 13:12, Graeme Gregory wrote:
> >On Tue, Apr 19, 2016 at 11:41:29AM +0100, G Gregory wrote:
> >>On 19 April 2016 at 11:26, Tomasz Nowicki wrote:
> >>>On 15.04.2016 19:06, Tomasz Nowicki wrote:
>
> Passes
On 19.04.2016 13:12, Graeme Gregory wrote:
On Tue, Apr 19, 2016 at 11:41:29AM +0100, G Gregory wrote:
On 19 April 2016 at 11:26, Tomasz Nowicki wrote:
On 15.04.2016 19:06, Tomasz Nowicki wrote:
Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
thus these passes should use
On Tue, Apr 19, 2016 at 11:41:29AM +0100, G Gregory wrote:
> On 19 April 2016 at 11:26, Tomasz Nowicki wrote:
> > On 15.04.2016 19:06, Tomasz Nowicki wrote:
> >>
> >> Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
> >> thus these passes should use Cavium-specific config access
On 19 April 2016 at 11:26, Tomasz Nowicki wrote:
> On 15.04.2016 19:06, Tomasz Nowicki wrote:
>>
>> Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
>> thus these passes should use Cavium-specific config access functions
>> that synthesize the missing EA capabilities.
>>
>> We a
On 15.04.2016 19:06, Tomasz Nowicki wrote:
Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
thus these passes should use Cavium-specific config access functions
that synthesize the missing EA capabilities.
We already have DT driver which addresses errata requirements and
allow
Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs,
thus these passes should use Cavium-specific config access functions
that synthesize the missing EA capabilities.
We already have DT driver which addresses errata requirements and
allows to use special PCI config accessors. Curren
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