kant...@163.com; zhichang.yuan 0...@gmail.com;
> linux-kernel@vger.kernel.org; Yuanzhichang; zourongr...@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Friday, November 25, 2016 8:46:11 AM CET Gabriele Paoloni wrote:
> > >
On Friday, November 25, 2016 8:46:11 AM CET Gabriele Paoloni wrote:
> > From: Arnd Bergmann [mailto:a...@arndb.de]
> >
> > On Wednesday, November 23, 2016 6:07:11 PM CET Arnd Bergmann wrote:
> > > On Wednesday, November 23, 2016 3:22:33 PM CET Gabriele Paoloni
> > wrote:
> > > > From: Arnd Bergman
ea...@arm.com; John
> Garry; o...@lixom.net; robh...@kernel.org; bhelgaas@go og le.com;
> kant...@163.com; zhichang.yua...@gmail.com; linux-
> ker...@vger.kernel.org; Yuanzhichang; zourongr...@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
On Thursday, November 24, 2016 5:12:49 PM CET zhichang.yuan wrote:
> On 2016/11/24 7:23, Arnd Bergmann wrote:
> > On Wednesday, November 23, 2016 6:07:11 PM CET Arnd Bergmann wrote:
> >> On Wednesday, November 23, 2016 3:22:33 PM CET Gabriele Paoloni wrote:
> >>> From: Arnd Bergmann [mailto:a...@ar
Hi, Arnd,
Thanks you very much!
To understand your idea more clear, I have some questions on your patch sketch.
Please check it below.
On 2016/11/24 7:23, Arnd Bergmann wrote:
> On Wednesday, November 23, 2016 6:07:11 PM CET Arnd Bergmann wrote:
>> On Wednesday, November 23, 2016 3:22:33 PM CET
On Wednesday, November 23, 2016 6:07:11 PM CET Arnd Bergmann wrote:
> On Wednesday, November 23, 2016 3:22:33 PM CET Gabriele Paoloni wrote:
> > From: Arnd Bergmann [mailto:a...@arndb.de]
> > > On Friday, November 18, 2016 5:03:11 PM CET Gabriele Paoloni wrote:
>
> Please don't proliferate the use
On Wednesday, November 23, 2016 3:22:33 PM CET Gabriele Paoloni wrote:
> From: Arnd Bergmann [mailto:a...@arndb.de]
> > On Friday, November 18, 2016 5:03:11 PM CET Gabriele Paoloni wrote:
> > > I think this is effectively what we are doing so far with patch 2/3.
> > > The problem with this patch i
63.com; zhichang.yua...@gmail.com; T homas Petazzoni;
> linux-kernel@vger.kernel.org; Yuanzhichang; o...@lixom.net
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Friday, November 18, 2016 5:03:11 PM CET Gabriele Paoloni wrote:
> > > On
On Friday, November 18, 2016 5:03:11 PM CET Gabriele Paoloni wrote:
> > On Friday, November 18, 2016 4:18:07 PM CET Gabriele Paoloni wrote:
> > > From: Arnd Bergmann [mailto:a...@arndb.de]
> > > > On Friday, November 18, 2016 12:53:08 PM CET Gabriele Paoloni
> > wrote:
> > > > For the ISA/LPC space
hichang.yua...@gmail.com; T homas Petazzoni;
> linux-kernel@vger.kernel.org; Yuanzhichang; o...@lixom.net
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Friday, November 18, 2016 4:18:07 PM CET Gabriele Paoloni wrote:
> > From: Arnd Bergma
On Friday, November 18, 2016 4:18:07 PM CET Gabriele Paoloni wrote:
> From: Arnd Bergmann [mailto:a...@arndb.de]
> > On Friday, November 18, 2016 12:53:08 PM CET Gabriele Paoloni wrote:
> > > From: Arnd Bergmann [mailto:a...@arndb.de]
> > > > On Friday, November 18, 2016 12:07:28 PM CET Gabriele Pa
zhichang.yua...@gmail.com; Thomas Petazzoni;
> linux-kernel@vger.kernel.org; Yuanzhichang; o...@lixom.net
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Friday, November 18, 2016 12:53:08 PM CET Gabriele Paoloni wrote:
> > From: Arnd Bergma
On Friday, November 18, 2016 12:53:08 PM CET Gabriele Paoloni wrote:
> From: Arnd Bergmann [mailto:a...@arndb.de]
> > On Friday, November 18, 2016 12:07:28 PM CET Gabriele Paoloni wrote:
> > > > I think there is no need to change a) here, we have PCIBIOS_MIN_IO
> > > > today and even if we don't ne
m; o...@lixom.net; bhelgaas@go og le.com;
> zhichang.yua...@gmail.com; Jason Gunthorpe; Thomas Petazzoni
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Friday, November 18, 2016 12:07:28 PM CET Gabriele Paoloni wrote:
> > > From: Arnd Ber
On Friday, November 18, 2016 12:07:28 PM CET Gabriele Paoloni wrote:
> > From: Arnd Bergmann [mailto:a...@arndb.de]
> > On Monday, November 14, 2016 11:26:25 AM CET liviu.du...@arm.com wrote:
> > > On Mon, Nov 14, 2016 at 08:26:42AM +, Gabriele Paoloni wrote:
> > > > > Nope, that is not what it
ger.kernel.org;
> catalin.mari...@arm.com; o...@lixom.net; bhelgaas@go ogle.com;
> zhichang.yua...@gmail.com; Jason Gunthorpe; Thomas Petazzoni
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Monday, November 14, 2016 11:26:25 AM CET liviu.du...@
[found this old mail in my drafts folder, might as well send it now]
On Thursday, November 10, 2016 8:36:24 PM CET zhichang.yuan wrote:
> Sorry! I can't catch your idea yet:(
>
> When to register the I/O range? Is it done just after the successfully
> of_translate_address() during the children sc
On Monday, November 14, 2016 11:26:25 AM CET liviu.du...@arm.com wrote:
> On Mon, Nov 14, 2016 at 08:26:42AM +, Gabriele Paoloni wrote:
> > > Nope, that is not what it means. It means that PCI devices can see I/O
> > > addresses
> > > on the bus that start from 0. There never was any usage for
On Mon, Nov 14, 2016 at 08:26:42AM +, Gabriele Paoloni wrote:
> Hi Liviu
>
[snip]
> > > >
> > > > Your idea is a good one, however you are abusing PCIBIOS_MIN_IO and
> > you
> > > > actually need another variable for "reserving" an area in the I/O
> > space
> > > > that can be used for physi
On Wed, 09 Nov 2016 22:34:38 +0100
Arnd Bergmann wrote:
> On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni wrote:
> > > On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
> > > > + /*
> > > > +* The first PCIBIOS_MIN_IO is reserved specifically for
n.mari...@arm.com; o...@lixom.net; bhelgaas@googl e.com;
> zhichang.yua...@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Fri, Nov 11, 2016 at 03:53:53PM +, Gabriele Paoloni wrote:
> > Hi Liviu
>
> Hi Gabriele,
el.org; xuwei (O); Linuxarm; zourongr...@gmail.com;
> > robh...@kernel.org; kant...@163.com; linux-ser...@vger.kernel.org;
> > catalin.mari...@arm.com; o...@lixom.net; bhelgaas@googl e.com;
> > zhichang.yua...@gmail.com
> > Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver imp
; will.dea...@arm.com; linux-
>>> ker...@vger.kernel.org; xuwei (O); Linuxarm; zourongr...@gmail.com;
>>> robh...@kernel.org; kant...@163.com; linux-ser...@vger.kernel.org;
>>> catalin.mari...@arm.com; o...@lixom.net; liviu.du...@arm.com;
>>> bhelgaas@googl e.
n.mari...@arm.com; o...@lixom.net; bhelgaas@googl e.com;
> zhichang.yua...@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Fri, Nov 11, 2016 at 01:39:35PM +, Gabriele Paoloni wrote:
> > Hi Arnd
> >
> > > -
mail.com;
> > robh...@kernel.org; kant...@163.com; linux-ser...@vger.kernel.org;
> > catalin.mari...@arm.com; o...@lixom.net; liviu.du...@arm.com;
> > bhelgaas@googl e.com; zhichang.yua...@gmail.com
> > Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
>
..@lixom.net; liviu.du...@arm.com;
> bhelgaas@googl e.com; zhichang.yua...@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Thursday, November 10, 2016 3:36:49 PM CET Gabriele Paoloni wrote:
> >
> > Where should we get the range from
Hi Arnd,
On Thu, Nov 10, 2016 at 05:07:21PM +0100, Arnd Bergmann wrote:
> On Thursday, November 10, 2016 3:36:49 PM CET Gabriele Paoloni wrote:
> >
> > Where should we get the range from? For LPC we know that it is going
> > Work on anything that is not used by PCI I/O space, and this is
> > why
Hi, Arnd,
On 2016/11/11 0:07, Arnd Bergmann wrote:
> On Thursday, November 10, 2016 3:36:49 PM CET Gabriele Paoloni wrote:
>>
>> Where should we get the range from? For LPC we know that it is going
>> Work on anything that is not used by PCI I/O space, and this is
>> why we use [0, PCIBIOS_MIN_IO
On Thursday, November 10, 2016 3:36:49 PM CET Gabriele Paoloni wrote:
>
> Where should we get the range from? For LPC we know that it is going
> Work on anything that is not used by PCI I/O space, and this is
> why we use [0, PCIBIOS_MIN_IO]
It should be allocated the same way we allocate PCI co
;
> liviu.du...@arm.com; bhelg...@google.com; zhichang.yua...@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Thursday, November 10, 2016 2:40:26 PM CET zhichang.yuan wrote:
> > On 2016/11/10 5:34, Arnd Bergmann wrote:
> >
Hi, Arnd,
On 2016/11/10 17:12, Arnd Bergmann wrote:
> On Thursday, November 10, 2016 2:40:26 PM CET zhichang.yuan wrote:
>> On 2016/11/10 5:34, Arnd Bergmann wrote:
>>> On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni wrote:
> On Tuesday, November 8, 2016 11:47:09 AM CET zhichan
On Thursday, November 10, 2016 2:40:26 PM CET zhichang.yuan wrote:
> On 2016/11/10 5:34, Arnd Bergmann wrote:
> > On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni wrote:
> >>> On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
> + /*
> +* The fi
Hi, Arnd,
On 2016/11/10 5:34, Arnd Bergmann wrote:
> On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni wrote:
>>> On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
+ /*
+* The first PCIBIOS_MIN_IO is reserved specifically for
>>> indirectIO.
>>
On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni wrote:
> > On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
> > > + /*
> > > +* The first PCIBIOS_MIN_IO is reserved specifically for
> > indirectIO.
> > > +* It will separate indirectIO range fro
> John Garry; Gabriele Paoloni; zhichang.yua...@gmail.com;
> kant...@163.com; xuwei (O)
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
> > + /*
> > +* The fi
On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
> + /*
> +* The first PCIBIOS_MIN_IO is reserved specifically for indirectIO.
> +* It will separate indirectIO range from pci host bridge to
> +* avoid the possible PIO conflict.
> +* Set the ind
Hi zhichang.yuan,
[auto build test WARNING on arm64/for-next/core]
[also build test WARNING on v4.9-rc4 next-20161028]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/zhichang-yuan/ARM64-LPC-lega
On hip06, the accesses to LPC peripherals work in an indirect way. A
corresponding LPC driver configure some registers in LPC master at first, then
the real accesses on LPC slave devices are finished by the LPC master, which
is transparent to LPC driver.
This patch implement the relevant driver for
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