On 12/14/2016 05:20 AM, Tin Huynh wrote:
On Tue, Dec 13, 2016 at 6:25 PM, Andy Shevchenko
+ param = i2c_dw_read_comp_param(dev);
+ tx_fifo_depth = ((param >> 16) & 0xff) + 1;
+ rx_fifo_depth = ((param >> 8) & 0xff) + 1;
+ if (!dev->tx_fifo_depth) {
+ dev->tx_fifo_dep
On Tue, Dec 13, 2016 at 6:25 PM, Andy Shevchenko
wrote:
> On Tue, 2016-12-13 at 17:03 +0700, Tin Huynh wrote:
>> ACPI always sets Tx/Rx FIFO to 32. This configuration will
>> cause problem if the IP core supports a FIFO size of less than 32.
>> The driver should read the FIFO size from the IP and
On 12/13/2016 01:25 PM, Andy Shevchenko wrote:
On Tue, 2016-12-13 at 17:03 +0700, Tin Huynh wrote:
ACPI always sets Tx/Rx FIFO to 32. This configuration will
cause problem if the IP core supports a FIFO size of less than 32.
The driver should read the FIFO size from the IP and select the
smaller
On Tue, 2016-12-13 at 17:03 +0700, Tin Huynh wrote:
> ACPI always sets Tx/Rx FIFO to 32. This configuration will
> cause problem if the IP core supports a FIFO size of less than 32.
> The driver should read the FIFO size from the IP and select the
> smaller
> one of the two.
>
> Signed-off-by: Tin
ACPI always sets Tx/Rx FIFO to 32. This configuration will
cause problem if the IP core supports a FIFO size of less than 32.
The driver should read the FIFO size from the IP and select the smaller
one of the two.
Signed-off-by: Tin Huynh
---
drivers/i2c/busses/i2c-designware-platdrv.c | 27 +
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