Hi Sivaprakash,
Sivaprakash Murugesan wrote on Fri, 12 Jun
2020 12:19:49 +0530:
> BAM is DMA controller on QCOM ipq platforms, BAM mode on NAND driver
> is set by writing BAM_MODE_EN bit on NAND_CTRL register.
>
> NAND_CTRL is an operational register and in BAM mode operational
> registers are
BAM is DMA controller on QCOM ipq platforms, BAM mode on NAND driver
is set by writing BAM_MODE_EN bit on NAND_CTRL register.
NAND_CTRL is an operational register and in BAM mode operational
registers are read only.
So, before writing into NAND_CTRL register check if BAM mode is already
enabled b
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