Re: [PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI

2016-12-13 Thread Mika Westerberg
On Mon, Dec 12, 2016 at 11:35:19AM -0800, Joe Perches wrote: > On Mon, 2016-12-12 at 21:21 +0200, Mika Westerberg wrote: > > On Mon, Dec 12, 2016 at 09:02:53PM +0200, Andy Shevchenko wrote: > > > > + tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; > > > > + rx_fifo_depth = ((param1 >> 8)  

Re: [PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI

2016-12-12 Thread Andy Shevchenko
On Mon, 2016-12-12 at 21:21 +0200, Mika Westerberg wrote: > On Mon, Dec 12, 2016 at 09:02:53PM +0200, Andy Shevchenko wrote: > > > + tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; > > > + rx_fifo_depth = ((param1 >> 8)  & 0xff) + 1; > > > + if (!dev->tx_fifo_depth) { > > > + dev->tx_fifo_dept

Re: [PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI

2016-12-12 Thread Joe Perches
On Mon, 2016-12-12 at 21:21 +0200, Mika Westerberg wrote: > On Mon, Dec 12, 2016 at 09:02:53PM +0200, Andy Shevchenko wrote: > > > + tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; > > > + rx_fifo_depth = ((param1 >> 8)  & 0xff) + 1; > > > + if (!dev->tx_fifo_depth) { > > > + dev->tx_fifo_dept

Re: [PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI

2016-12-12 Thread Mika Westerberg
On Mon, Dec 12, 2016 at 09:02:53PM +0200, Andy Shevchenko wrote: > > + tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; > > + rx_fifo_depth = ((param1 >> 8)  & 0xff) + 1; > > + if (!dev->tx_fifo_depth) { > > + dev->tx_fifo_depth = tx_fifo_depth; > > + dev->rx_fifo_depth = rx_f

Re: [PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI

2016-12-12 Thread Andy Shevchenko
Thanks for an update! My comments below. On Mon, 2016-12-12 at 15:36 +0700, Tin Huynh wrote: > ACPI always sets txfifo and rxfifo to 32. This configuration will > cause problem if the IP core supports a fifo size of less than 32. > The driver should read the fifo size from the IP and select the  >

[PATCH V3] i2c: designware: fix wrong tx/rx fifo for ACPI

2016-12-12 Thread Tin Huynh
ACPI always sets txfifo and rxfifo to 32. This configuration will cause problem if the IP core supports a fifo size of less than 32. The driver should read the fifo size from the IP and select the smaller one of the two. Signed-off-by: Tin Huynh --- drivers/i2c/busses/i2c-designware-platdrv.c