Please ignore this patch set. Right patch-set is V5.
https://patchwork.kernel.org/project/linux-mmc/list/?series=41661
Sorry for the inconvenience.
Thanks
Veera
On 11/12/2018 12:08 PM, Veerabhadrarao Badiganti wrote:
On few SDHCI-MSM controllers, the host controller's clock tuning
circui
On few SDHCI-MSM controllers, the host controller's clock tuning
circuit may go out of sync if controller clocks are gated which
eventually will result in data CRC, command CRC/timeout errors.
To overcome this h/w limitation, the DLL needs to be re-initialized
and restored with its old settings onc
On 10/17/2018 3:58 AM, Evan Green wrote:
On Mon, Oct 8, 2018 at 6:26 AM Veerabhadrarao Badiganti
wrote:
On few SDHCI-MSM controllers, the host controller's clock tuning
circuit may go out of sync if controller clocks are gated which
eventually will result in data CRC, command CRC/timeout erro
On Mon, Oct 8, 2018 at 6:26 AM Veerabhadrarao Badiganti
wrote:
>
> On few SDHCI-MSM controllers, the host controller's clock tuning
> circuit may go out of sync if controller clocks are gated which
> eventually will result in data CRC, command CRC/timeout errors.
> To overcome this h/w limitation,
On few SDHCI-MSM controllers, the host controller's clock tuning
circuit may go out of sync if controller clocks are gated which
eventually will result in data CRC, command CRC/timeout errors.
To overcome this h/w limitation, the DLL needs to be re-initialized
and restored with its old settings onc
5 matches
Mail list logo
