Re: [PATCH V2] soc: imx: gpcv2: correct PGC offset

On Wed, May 30, 2018 at 09:30:42AM +0800, Anson Huang wrote: > Correct MIPI/PCIe/USB_HSIC's PGC offset based on > design RTL, the values in the Reference Manual > (Rev. 1, 01/2018 and the older ones) are incorrect. > > The correct offset values should be as below: > > 0x800 ~ 0x83F: PGC for core0

Re: [PATCH V2] soc: imx: gpcv2: correct PGC offset

Hi Anson, On Tue, May 29, 2018 at 10:30 PM, Anson Huang wrote: > Correct MIPI/PCIe/USB_HSIC's PGC offset based on > design RTL, the values in the Reference Manual > (Rev. 1, 01/2018 and the older ones) are incorrect. > > The correct offset values should be as below: > > 0x800 ~ 0x83F: PGC for cor

[PATCH V2] soc: imx: gpcv2: correct PGC offset

Correct MIPI/PCIe/USB_HSIC's PGC offset based on design RTL, the values in the Reference Manual (Rev. 1, 01/2018 and the older ones) are incorrect. The correct offset values should be as below: 0x800 ~ 0x83F: PGC for core0 of A7 platform; 0x840 ~ 0x87F: PGC for core1 of A7 platform; 0x880 ~ 0x8BF