On Wednesday 13 February 2013 10:04 PM, Stephen Warren wrote:
On 02/13/2013 12:02 AM, Laxman Dewangan wrote:
On Tuesday 12 February 2013 11:16 PM, Stephen Warren wrote:
On 02/12/2013 08:17 AM, Laxman Dewangan wrote:
Initialise the parent of UARTs to PLLP and disabling clock by
default.
This p
On 02/13/2013 12:02 AM, Laxman Dewangan wrote:
> On Tuesday 12 February 2013 11:16 PM, Stephen Warren wrote:
>> On 02/12/2013 08:17 AM, Laxman Dewangan wrote:
>>> Initialise the parent of UARTs to PLLP and disabling clock by
>>> default.
>>
>> This patch wasn't tested, was it? Without the patch I j
On Tuesday 12 February 2013 11:16 PM, Stephen Warren wrote:
On 02/12/2013 08:17 AM, Laxman Dewangan wrote:
Initialise the parent of UARTs to PLLP and disabling clock by
default.
This patch wasn't tested, was it? Without the patch I just sent titled
"ARM: tegra: remove clock-frequency properties
Quoting Stephen Warren (2013-02-12 09:46:25)
> On 02/12/2013 08:17 AM, Laxman Dewangan wrote:
> > Initialise the parent of UARTs to PLLP and disabling clock by
> > default.
>
> This patch wasn't tested, was it? Without the patch I just sent titled
> "ARM: tegra: remove clock-frequency properties f
On 02/12/2013 08:17 AM, Laxman Dewangan wrote:
> Initialise the parent of UARTs to PLLP and disabling clock by
> default.
This patch wasn't tested, was it? Without the patch I just sent titled
"ARM: tegra: remove clock-frequency properties from serial nodes", the
UART clocks get turned off and the
Initialise the parent of UARTs to PLLP and disabling clock by
default.
Signed-off-by: Laxman Dewangan
---
As suggested by Stephen, Make other uarts clock state to disable as
driver already enable these clocks.
drivers/clk/tegra/clk-tegra20.c |7 +--
drivers/clk/tegra/clk-tegra30.c |
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