Re: [PATCH RESEND 2/2] i2c: pnx: Fix read transactions of >= 2 bytes

2012-08-19 Thread Roland Stigge
Hi, On 18/08/12 11:52, Wolfram Sang wrote: > On Wed, Aug 08, 2012 at 09:42:32AM +0200, Roland Stigge wrote: >> On transactions with n>=2 bytes, the controller actually wrongly >> clocks in n+1 bytes. This is caused by the (wrong) assumption >> that RFE in the Status Register is 1 iff there is no b

Re: [PATCH RESEND 2/2] i2c: pnx: Fix read transactions of >= 2 bytes

2012-08-18 Thread Wolfram Sang
On Wed, Aug 08, 2012 at 09:42:32AM +0200, Roland Stigge wrote: > On transactions with n>=2 bytes, the controller actually wrongly clocks in n+1 > bytes. This is caused by the (wrong) assumption that RFE in the Status > Register > is 1 iff there is no byte already ordered (via a dummy TX byte). Thi

[PATCH RESEND 2/2] i2c: pnx: Fix read transactions of >= 2 bytes

2012-08-08 Thread Roland Stigge
On transactions with n>=2 bytes, the controller actually wrongly clocks in n+1 bytes. This is caused by the (wrong) assumption that RFE in the Status Register is 1 iff there is no byte already ordered (via a dummy TX byte). This lead to the implementation of synchronized byte ordering, e.g.: Dummy