Re: [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions

2016-07-27 Thread Maxime Ripard
On Wed, Jul 27, 2016 at 03:32:58PM +0800, Chen-Yu Tsai wrote: > On Wed, Jul 27, 2016 at 3:30 PM, Maxime Ripard > wrote: > > On Tue, Jul 26, 2016 at 03:04:29PM +0800, Chen-Yu Tsai wrote: > >> On sunxi we support cpufreq by changing the clock rate of PLL-CPU. > >> It's possible the clock output of t

Re: [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions

2016-07-27 Thread Chen-Yu Tsai
On Wed, Jul 27, 2016 at 3:30 PM, Maxime Ripard wrote: > On Tue, Jul 26, 2016 at 03:04:29PM +0800, Chen-Yu Tsai wrote: >> On sunxi we support cpufreq by changing the clock rate of PLL-CPU. >> It's possible the clock output of the PLL goes out of the CPU's >> operational limits when the PLL's multip

Re: [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions

2016-07-27 Thread Maxime Ripard
On Tue, Jul 26, 2016 at 03:04:29PM +0800, Chen-Yu Tsai wrote: > On sunxi we support cpufreq by changing the clock rate of PLL-CPU. > It's possible the clock output of the PLL goes out of the CPU's > operational limits when the PLL's multipliers / dividers are changed > and it hasn't stabilized yet.

[PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions

2016-07-26 Thread Chen-Yu Tsai
On sunxi we support cpufreq by changing the clock rate of PLL-CPU. It's possible the clock output of the PLL goes out of the CPU's operational limits when the PLL's multipliers / dividers are changed and it hasn't stabilized yet. This would result in the CPU hanging. To circumvent this, we tempora