On Wed, Sep 17 2014 at 07:51:38 PM, Russell King - ARM Linux
wrote:
Hi Russell,
> On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
>> This patch provides support for arm's newly added IPI FIQ. It works
>> by placing all interrupt sources *except* IPI FIQ in group 1 and
>> then f
On 18/09/14 01:17, Russell King - ARM Linux wrote:
> On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
>> @@ -604,8 +731,19 @@ static void gic_raise_softirq(const struct cpumask
>> *mask, unsigned int irq)
>> {
>> int cpu;
>> unsigned long flags, map = 0;
>> +unsigned
On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
> @@ -604,8 +731,19 @@ static void gic_raise_softirq(const struct cpumask
> *mask, unsigned int irq)
> {
> int cpu;
> unsigned long flags, map = 0;
> + unsigned long softint;
>
> - raw_spin_lock_irqsave(&irq_co
On Wed, Sep 17, 2014 at 10:07:13PM +0100, Russell King - ARM Linux wrote:
> On Wed, Sep 17, 2014 at 01:12:23PM -0700, Daniel Thompson wrote:
> > I may have missed something but this sounds like the expected behaviour
> > to me.
> >
> > Without AckCtl set (GIC_CPU_CTRL bit 2) then it is not possibl
On Wed, Sep 17, 2014 at 01:12:23PM -0700, Daniel Thompson wrote:
> On 17/09/14 11:51, Russell King - ARM Linux wrote:
> > On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
> >> This patch provides support for arm's newly added IPI FIQ. It works
> >> by placing all interrupt sources *
On 17/09/14 11:51, Russell King - ARM Linux wrote:
> On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
>> This patch provides support for arm's newly added IPI FIQ. It works
>> by placing all interrupt sources *except* IPI FIQ in group 1 and
>> then flips a configuration bit in the G
On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
> This patch provides support for arm's newly added IPI FIQ. It works
> by placing all interrupt sources *except* IPI FIQ in group 1 and
> then flips a configuration bit in the GIC such that group 1
> interrupts use IRQ and group 0 in
This patch provides support for arm's newly added IPI FIQ. It works
by placing all interrupt sources *except* IPI FIQ in group 1 and
then flips a configuration bit in the GIC such that group 1
interrupts use IRQ and group 0 interrupts use FIQ.
All GIC hardware except GICv1-without-TrustZone suppor
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