On 17/05/16 15:31, Paul Burton wrote:
When EIC mode is in use (cpu_has_veic is true) enable it on each CPU
during GIC initialisation. Otherwise there may be a mismatch between the
hardware default interrupt model & that expected by the kernel.
Signed-off-by: Paul Burton
---
drivers/irqchip
When EIC mode is in use (cpu_has_veic is true) enable it on each CPU
during GIC initialisation. Otherwise there may be a mismatch between the
hardware default interrupt model & that expected by the kernel.
Signed-off-by: Paul Burton
---
drivers/irqchip/irq-mips-gic.c | 10 +-
1 file cha
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